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voltage regulators 1 AN8049FHN 1.8-volt 3-channel step-up, step-down, and polarity inverting dc-dc converter control ic n overview the AN8049FHN is a three-channel pwm dc-dc converter control ic that features low-voltage operation. this ic can form a power supply that provides two step- up outputs and one step-down or polarity inverted output with a minimal number of external components. minimal operating supply voltage of this ic is as low as 1.8 v, so that it can operate from 2 dry-batteries. and also, it is housed in an ultrathin, 4-directional- lead smd-package whose thickness is 0.8 mm maximum and pin-pitch is 0.5 mm therefore it is most suitable for making a power supply small and thin. n features wide operating supply voltage range: 1.8 v to 14 v high-precision reference voltage circuit v ref pin voltage: 1% error amplifier: 1.5% ultrathin surface mounting package for miniaturized and thinner power supplies package: qfn-24 0.5-mm lead pitch 5.4 mm 4.4 mm t 0.8 mm supports control over a wide output frequency range: 20 khz to 1 mhz on/off (sequence control) pins provided for each channel for easy sequence control setup the negative supply error amplifier supports 0-volt input. common-mode input voltage range: - 0.1 v to v cc - 1.4 v this allows the number of external components to be reduced by two resistors. fixed duty factor: 86% however, the duty can be adjusted to anywhere from 0% to 100% with an external resistor. timer latch short-circuit protection circuit (charge current: 1.1 m a typical) low input voltage malfunction prevention circuit (u.v.l.o.) (operation start voltage: 1.67 v typical) standby function (active-high control input, standby mode current: 1 m a maximum) n applications electronic equipment that requires a power supply system qfn024-p-0405 unit: mm 5.00.1 3-c0.5 19 13 1 19 1 7 13 7 8 12 8 12 24 20 24 20 4.00.1 5.20.2 (1.10) 3.00.2 seating plane r0.3 4.00.1 2.00.2 (1.10) 4.20.2 3.00.1 a b 0.20.1 0.80max. s 0.50 0.20.1 0.10 s s a b m 0.10
AN8049FHN voltage regulators 2 n pin descriptions pin no. description 1 dt2 2 dt1 3 ctl3 4 ctl2 5 ctl1 6 off 7v ref 8 rb2 9 rb1 10 out1 11 out2 12 gnd pin no. description 13 out3 14 v cc 15 osc 16 in + 3 17 in - 3 18 fb3 19 in - 2 20 fb2 21 in - 1 22 fb1 23 s.c.p. 24 dt3 n block diagram in-1 21 fb1 22 ctl1 5 v cc 14 dt1 2 v ref 7 osc 15 off 6 20 k w 1.1 ma 1.26 v ctl3 dt3 in - 3 17 in + 3 fb3 18 s.c.p. rb1 out1 out3 rb2 out2 gnd 23 16 3 24 in - 2 19 fb2 20 1.26 v error amplifier 3 ctl2 dt2 4 1 1.26 v 1.26 v 1.1 ma 1.1 ma 1.1 ma 0.9 v error amplifier 1 error amplifier 2 50 k w 50 k w v ref v cc 50 k w 50 k w v cc on/off control reference voltage supply v ref triangular wave generator 0.7 v 0.3 v 1.26 v (allowance: 1%) s.c.p. comp. latch u.v.l.o. r s q 1.26 v 1.26 v 20 k w 20 k w pwm2 pwm3 pwm1 v ref 50 k w 30 k w 30 k w 50 k w 9 10 v cc 11 8 13 12
voltage regulators AN8049FHN 3 note) * 1: t a = 85 c. for the independent ic without a heat sink. * 2: when v cc is less than 6 v, v in - 1 and v in + 2 must be v cc . n absolute maximum ratings parameter symbol rating unit supply voltage v cc 14.2 v off pin allowable application voltage v off 14.2 v error amplifier input allowable v in v cc v application voltage *2 out1 and out2 pin output i so(out) - 50 ma source current out3 pin output current i si(out) + 50 ma power dissipation *1 p d 111 mw operating temperature t opr - 30 to + 85 c storage temperature t stg - 55 to + 150 c n recommended operating range parameter symbol range unit off pin application voltage v off 0 to 14 v out1 and out2 pin output source current i so(out) - 40 (min.) ma out3 pin output current i si(out) 40 (max.) ma timing resistance r t 3 to 33 kw timing capacitance c t 100 to 1 000 pf oscillator frequency f out 20 to 1 000 khz short-circuit protection time-constant setting capacitance c scp 1 000 (min.) pf output current setting resistance r b 750 to 15 000 w
AN8049FHN voltage regulators 4 parameter symbol conditions min typ max unit reference voltage block reference voltage v ref i ref = - 0.1 ma 1.247 1.26 1.273 v line regulation with input fluctuation line v cc = 1.8 v to 14 v ? 220mv load regulation load i ref = - 0.1 ma to - 1 ma - 20 - 3 ? mv v ref temperature characteristics v rfedt t a = - 30c to + 85c ? 1 ? % v ref pin short-circuit current i oc ?- 10 ? ma u.v.l.o. block circuit operation start voltage v uon 1.59 1.67 1.75 v error amplifier 1 block input threshold voltage 1 v th1 1.241 1.26 1.279 v input bias current 1 i b1 ? 0.1 0.2 m a high-level output voltage 1 v eh1 1.0 1.2 1.4 v low-level output voltage 1 v el1 ?? 0.2 output source current 1 i so(fb)1 - 38 - 31 - 24 m a output sink current 1 i si(fb)1 0.5 ?? ma v th temperature characteristics 1 v thdt1 t a = - 30 c to + 85 c ? 1.5 ? % open-loop gain 1 a v1 ? 80 ? db error amplifier 2 block input threshold voltage 2 v th2 1.241 1.26 1.279 v input bias current 2 i b2 ? 0.1 0.2 m a high-level output voltage 2 v eh2 1.0 1.2 1.4 v low-level output voltage 2 v el2 ?? 0.2 output source current 2 i so(fb)2 - 38 - 31 - 24 m a output sink current 2 i si(fb)2 0.5 ?? ma v th temperature characteristics 2 v thdt2 t a = - 30 c to + 85 c ? 1.5 ? % open-loop gain 2 a v2 ? 80 ? db error amplifier 3 block input offset voltage v io - 6 ? 6mv common-mode input voltage range v icr - 0.1 ? v cc v - 1.4 input bias current 3 i b3 - 0.6 - 0.3 ?m a high-level output voltag 3 v eh3 1.0 1.2 1.4 v low-level output voltage 3 v el3 ?? 0.2 output source current 3 i so(fb)3 - 38 - 31 - 24 m a output sink current 3 i si(fb)3 0.5 ?? ma open-loop gain 3 a v3 ? 80 ? db n electrical characteristics at v cc = 2.4 v, c ref = 0.1 m f, t a = 25 c
voltage regulators AN8049FHN 5 n electrical characteristics (continued) at v cc = 2.4 v, c ref = 0.1 m f, t a = 25 c parameter symbol conditions min typ max unit oscillator block oscillator frequency f out r t = 7.5 k w , c t = 680 pf 170 190 210 khz frequency supply voltage f dv r t = 7.5 k w , c t = 680 pf ? 1 ? % characteristics frequency temperature f dt r t = 7.5 k w , c t = 680 pf ? 3 ?% characteristics output 1 block output duty factor 1 du 1 r t = 7.5 k w , c t = 680 pf 80 86 92 % high-level output voltage 1 v oh1 i o = - 10 ma, r b = 1 k w v cc - 1 ?? v low-level output voltage 1 v ol1 i o = 10 ma, r b = 1 k w?? 0.2 v output source current 1 i so(out)1 v o = 0.7 v, r b = 1 k w- 32 - 27 - 22 ma output sink current 1 i si(out)1 v o = 0.7 v, r b = 1 k w 40 ?? ma pull-down resistor 1 r o1 20 30 40 k w output 2 block output duty factor 2 du 2 r t = 7.5 k w , c t = 680 pf 80 86 92 % high-level output voltage 2 v oh2 i o = - 10 ma, r b = 1 k w v cc - 1 ?? v low-level output voltage 2 v ol2 i o = 10 ma, r b = 1 k w?? 0.2 v output source current 2 i so(out)2 v o = 0.7 v, r b = 1 k w- 32 - 27 - 22 ma output sink current 2 i si(out)2 v o = 0.7 v, r b = 1 k w 40 ?? ma pull-down resistor 2 r o2 20 30 40 k w output 3 block output duty factor 3 du 3 r t = 7.5 k w , c t = 680 pf 80 86 92 % output saturation voltage v o(sat) ?? 0.2 v short-circuit protection circuit block input standby voltage v stby ?? 0.1 v input threshold voltage v thpc 0.8 0.9 1.0 v input latch voltage v in ?? 0.1 v charge current i chg v scp = 0 v - 1.3 - 1.0 - 0.7 m a comparator threshold voltage v thl ? 1.26 ? v on/off control block input threshold voltage v on(th) 0.7 1.0 1.3 v off pin current i off v off = 5 v ? 35 ?m a ctl block input threshold voltage v thctl 1.07 1.26 1.47 v charge current i ctl v ctl = 0 v - 1.3 - 1.0 - 0.7 m a whole device average consumption current i cc(off) r b = 9.1 k w , duty = 50% ? 4.2 5.5 ma standby mode current i cc(sb) ?? 1 m a
AN8049FHN voltage regulators 6 pin no. equivalent circuit description i/o 1 dt2: i sets the channel 2 soft start time. set the time by connecting a capacitor between this pin and ground. note that although the channel 2 maximum on duty is set internally to 86%, the maximum on duty can be set to a value of 86% or less by inserting a resistor between this pin and ground, and can be set to a value of 86% or more by inserting a resistor between this pin and the v ref pin. 2 dt1: sets the channel 1 soft start time. set the time by connecting a capacitor between this pin and ground. note that although the channel 1 maximum on duty is set internally to 86%, the maximum on duty can be set to a value of 86% or less by inserting a resistor between this pin and ground, and can be set to a value of 86% or more by inserting a resistor between this pin and the v ref pin. 3 ctl3: i controls the on/off state of channel 3. a delay can be provided in the power supply turn-on start time by connecting a capacitor between this pin and ground. t dly3 = 1.26 (v) c ctl3 ( m f)/1.1 ( m a) (s) this pin can also be used to control the on/off state with an external signal. in that case, the allowable input voltage range is from 0 v to v cc . note that during u.v.l.o. and timer latch operation, this pin is connected to ground through a 20 k w resistor. n terminal equivalent circuit pwm2 50 k w 50 k w 1 7 15 20 pwm1 50 k w 50 k w 15 22 7 2 1.26 v v cc 20 k w 1.1 m a high channel 3 operation is turned off. 3
voltage regulators AN8049FHN 7 pin no. equivalent circuit description i/o 4 ctl2: i controls the on/off state of channel 2. a delay can be provided in the power supply turn-on start time by connecting a capacitor between this pin and ground. t dly2 = 1.26 (v) c ctl2 ( m f)/1.1 ( m a) (s) this pin can also be used to control the on/off state with an external signal. in that case, the allowable input voltage range is from 0 v to v cc . note that during u.v.l.o. and timer latch operation, this pin is connected to ground through a 20 k w resistor. 5 ctl1: i controls the on/off state of channel 1. a delay can be provided in the power supply turn-on start time by connecting a capacitor between this pin and ground. t dly1 = 1.26 (v) c ctl1 ( m f)/1.1 ( m a) (s) this pin can also be used to control the on/off state with an external signal. in that case, the allowable input voltage range is from 0 v to v cc . note that during u.v.l.o. and timer latch operation, this pin is connected to ground through a 20 k w resistor. 6 off: i controls the on/off state. when the input is high: normal operation (v off > 1.2 v) when the input is low: standby mode v off < 0.6 v) in standby mode, the total current consumption is held to under 1 m a. 7v ref :o outputs the internal reference voltage. the reference voltage is 1.26 v (allowance: 1%) when v cc is 2.4 v and i ref is - 0.1 ma. insert a capacitor of at least 0.1 m f between v ref and ground for phase compensation. 1.26 v v cc 20 k w 1.1 m a high channel 2 operation is turned off. 4 n terminal equivalent circuit (continued) 1.26 v v cc 20 k w 1.1 m a high channel 1 operation is turned off. 5 100 k w start and stop of internal circuits. 6 v cc 7
AN8049FHN voltage regulators 8 pin no. equivalent circuit description i/o 8 rb2: i connection for a resistor that sets the channel 2 output source current. use a resistor in the range 750 w to 1.5 k w . 9 rb1: i connection for a resistor that sets the channel 1 output source current. use a resistor in the range 750 w to 1.5 k w . 10 out1: o push-pull output. the absolute maximum rating for the output source current is - 50 ma. connecting the external resistor to rb1 terminal allows this circuit to provide an output source current with excellent line regulation and minimal sample-to- sample variations. 11 out2: o push-pull output. the absolute maximum rating for the output source current is - 50 ma. connecting the external resistor to rb2 terminal allows this circuit to provide an output source current with excellent line regulation and minimal sample-to- sample variations. 12 gnd: ? ground. n terminal equivalent circuit (continued) v cc 200 w 30 k w 8 11 v cc 200 w 30 k w 9 10 v cc 30 k w i so(out)1 9 10 v cc 30 k w i so(out)2 8 11 12
voltage regulators AN8049FHN 9 pin no. equivalent circuit description i/o 13 out3: o open-collector output. the absolute maximum rating for the output current is + 50 ma. 14 v cc : ? power supply terminal. provide the operating supply voltage in the range 1.8 v to 14 v. 15 osc: o connection for the capacitor and resistor that determine the oscillator frequency. use a capacitor in the range 100 pf to 1 000 pf and a resistor in the range 3 k w to 33 k w . use an oscillator frequency in the range 20 khz to 1 mhz. 16 in+3: i noninverting input to the error amplifier 3. 17 in - 3: i inverting input to the error amplifier 3. 18 fb3: o output from the error amplifier 3. this circuit can provide a source current of - 31 m a or a sink current of 0.5 ma (minimum). 19 in - 2: i inverting input to the error amplifier 2. n terminal equivalent circuit (continued) v cc 13 14 0.2 v v cc latch s r q 15 31 m a 0.5 ma min. osc pwm3 16 17 18 7 1.26 v 1.5 k w 19 14 v cc 1.5 k w 1.5 k w 16 17
AN8049FHN voltage regulators 10 pin no. equivalent circuit description i/o 20 fb2: o output from the error amplifier 2. this circuit can provide a source current of - 31 m a or a sink current of 0.5 ma (minimum). 21 in - 1: i inverting input to the error amplifier 1. 22 fb1: o output from the error amplifier 1. this circuit can provide a source current of - 31 m a or a sink current of 0.5 ma (minimum). 23 s.c.p.: o connection for the capacitor that sets the timer latch short-circuit protection circuit time constant. use a capacitor with a value of 1 000 pf or higher. the charge current i chg is 1.1 m a typical. 24 dt3: i sets the channel 3 soft start time. set the time by connecting a capacitor between this pin and ground. note that although the channel 3 maximum on duty is set internally to 86%, the maximum on duty can be set to a value of 86% or less by inserting a resistor between this pin and ground, and can be set to a value of 86% or more by inserting a resistor between this pin and the v ref pin. n terminal equivalent circuit (continued) 31 m a 0.5 ma min. v cc 1.26 v osc pwm2 20 19 1.26 v v cc latch s r q 1.1 m a 1.5 k w output shutoff 23 50 k w 50 k w pwm3 24 7 18 15 31 m a v cc 1.26 v osc pwm1 21 22 0.5 ma min. 1.26 v 1.5 k w 14 21
voltage regulators AN8049FHN 11 n usage notes [1] allowable power dissipation since the power dissipation (p) in this ic increases proportionally with the supply voltage, applications must be careful to operate so that the loss does not exceed the allowable power dissipation, p d , for the package. reference formula: p = (v cc - v beq1 ) i so(out)1 du 1 ? power dissipation in the channel 1 output stage + (v cc - v beq2 ) i so(out)2 du 2 ? power dissipation in the channel 2 output stage + v o(sat)3 i out3 du 3 ? power dissipation in the channel 3 output stage + v cc i cc ? power dissipation between v cc and ground < p d v beq1 : the voltage between the base and emitter of the npn transistor q1 i so(out)1 : the out1 pin output source current (when r rb1 is 1 k w , i so(out)1 will be 38 ma, maximum.) du 1 : the output 1 duty factor v beq2 : the voltage between the base and emitter of the npn transistor q2 i so(out)2 : the out2 pin output source current (when r rb2 is 1 k w , i so(out)2 will be 38 ma, maximum.) du 2 : the output 2 duty factor v o(sat)3 : the out3 pin saturation voltage (0.5 v maximum when out1 is 40 ma.) i out3 : the out3 pin current (this will be {v cc - v beq3 - v o(sat)3 }/r o3 .) du 3 : the output 3 duty factor i cc : the v cc pin current [2] allowable v cc ripple v cc ripple due to the switching transistor being turned on and off can cause this ic's u.v.l.o. circuit, which is biased by v cc , to operate incorrectly, and can cause the s.c.p. capacitor charging operation to fail to start when the output is shorted. the figure shows the allowable range for v cc ripple. applications should reduce v cc ripple to be within this range, either by inserting a ripple filter in the v cc line or by inserting a capacitor between the ic gnd and v cc pins and locating that capacitor as close to the ic as possible. note that the allowable range shown here is the result of testing the ic alone and that the allowable range may differ depending on the actual structure of the power supply circuit. also note that this allowable range is a design target, and is not guaranteed by testing of all samples. allowable v cc ripple ripple frequency (hz) 10 m 1 m 100 k 10 k v cc ripple voltage v cc (ac) (v[p-p]) 012345678 allowable range when v cc is 3 v. allowable range when v cc is 10 v.
AN8049FHN voltage regulators 12 n application notes [1] qfn024-p-0405 package power dissipation p d ? t a power dissipation p d (w) ambient temperature t a ( c) 0.000 0 25 50 75 85 100 125 1.200 1.075 1.000 0.800 0.600 0.660 0.400 0.200 0.279 independent ic without a heat sink r th(j - a) = 357.4 c/w when mounted on a 4-layer printed circuit board (50 50 t0.8 mm 3 ) r th(j - a) = 93.0 c/w when mounted on a standard printed circuit board (glass epoxy: 50 50 t0.8 mm 3 ) r th(j - a) = 151.5 c/w
voltage regulators AN8049FHN 13 n application notes (continued) [2] main characteristics timing capacitance ? oscillator frequency f osc ? maximum output duty (r t = 3 k w ) f osc ? maximum output duty (r t = 7.5 k w ) 10k 1m 10p 1n 10n c t (f) f out (hz) 100k r t = 3 k w r t = 33 k w r t = 7.5 k w 95 90 85 80 75 1m 100k 10k f osc (hz) du 1 , du 2 , du 3 (%) du 1 , du 2 du 3 95 90 85 80 75 1m 100k 10k f osc (hz) du 1 , du 2 , du 3 (%) du 1 , du 2 du 3 f osc ? maximum output duty (r t = 33 k w ) 95 90 85 80 75 1m 100k 10k f osc (hz) du 1 , du 2 , du 3 (%) du 3 du 1 du 2 r b ? i so(out) r b ? i si(out) 100 90 80 70 60 50 40 30 20 10 0 100k 10k 1k 100 r b ( w ) i si(out) (ma) 1.8 v, 2.4 v 8 v v cc = 14 v 0 - 10 -2 0 -3 0 -4 0 -5 0 -6 0 -7 0 - 80 100k 10k 1k 100 r b ( w ) i so(out) (ma) v cc = 1.8 v 2.4 v 14 v 8 v
AN8049FHN voltage regulators 14 n application notes (continued) [3] timing charts output short 1.26 v 0.9 v fb osc dt 1.67 v 1.26 v v cc pin voltage waveform s.c.p. pin voltage waveform ctl pin voltage waveform out1/2 pin voltage waveform totem pole circuit output (step-up output) out3 pin voltage waveform open-collector output (inverting or step-down output)
voltage regulators AN8049FHN 15 n application notes (continued) [4] function descriptions 1. reference voltage block this circuit is composed of a band gap circuit, and outputs a 1.26 v (typical) reference voltage that is temperature compensated to a precision of 1%. this reference voltage is stabilized when the supply voltage is 1.8 v or higher. this reference voltage is used by error amplifiers 1 and 2. 2. triangular wave generator this circuit generates a triangular wave like a sawtooth with a peak of 0.7 v and a trough of 0.2 v using a capacitor c t (for the time constant) and resistor r t connected to the osc pin (pin 15). the oscillator frequency can be set to an arbitrary value by selecting appropriate values for the external capacitor and resis- tor, c t and r t . this ic can use an oscillator frequency in the range 20 khz to 1 mhz. the triangular wave signal is provided to the noninverting input of the pwm comparator in each channel internally to the ic. use the formulas below for rough calculation of the oscilla- tor frequency. note, however, that the above formulas do not take the rapid charge time, overshoot, and undershoot into account. see the experimentally determined graph of the oscillator frequency vs. timing capacitance value pro- vided in the main characteristics section. 3. error amplifier 1 this circuit is an npn-transistor input error amplifier that detects and amplifies the dc-dc converter output voltage, and inputs that signal to a pwm comparator. the 1.26 v internal reference voltage is applied to the noninverting input. arbitrary gain and phase compen- sation can be set up by inserting a resistor and capacitor in series between the fb1 pin (pin 22) and the in 1 pin (pin 21). the output voltage v out1 can be set using the circuit shown in the figure. f osc ? - 1 ? 0.8 1 (hz) c t r t ln v oscl c t r t v osch figure 1. triangular oscillator waveform figure 2. connection method of error amplifier 1 (step-up output) t 2 t 1 t v osch 0.7 v v oscl 0.2 v discharge rapid charge 21 22 1.26 v in - 1 to the pwm comparator input r2 r1 fb1 v out1 error amplifier 1 v out1 = 1.26 r 1 + r 2 r 2
AN8049FHN voltage regulators 16 n application notes (continued) [4] function descriptions (continued) 4. error amplifier 2 this circuit is an npn-transistor input error amplifier that detects and amplifies the dc-dc converter output voltage, and inputs that signal to a pwm comparator. the 1.26 v internal reference voltage is applied to the noninverting input. arbi- trary gain and phase compensation can be set up by inserting a resistor and capacitor in series be- tween the fb2 pin (pin 20) and the in - 2 pin (pin 19). the output voltage v out2 can be set using the circuit shown in the figure. 5. error amplifier 3 this circuit is a pnp-transistor input error amplifier that detects and amplifies the dc-dc converter output voltage and inputs that signal to a pwm comparator. arbitrary gain and phase compensation can be set up by inserting a resistor and capacitor in series between the fb3 pin (pin 18) and the in - 3 pin (pin 17). the output voltage v out3 can be set using the circuit shown in the figure. step-down output inverting output figure 4. connection method of error amplifier 3 6. timer latch short-circuit protection circuit this circuit protects the external main switching elements, flywheel diodes, choke coils, and other components against degradation or destruction if an excessive load or a short circuit of the power supply output continues for longer than a certain fixed period. the timer latch short-circuit protection circuit detects the output of the error amplifiers. if the dc-dc converter output voltage drops and an fb pin (pins 18, 20, or 22) voltage exceeds 0.9 v, the s.c.p. comparator outputs a low level and the timer circuit starts. this starts charging the external protection circuit delay time capacitor. if the error amplifier output does not return to the normal voltage range before that capacitor reaches 1.26 v, the latch circuit latches, the output drive transistors are turned off, and the dead-time is set to 100%. figure 3. connection method of error amplifier 2 (step-up output) 19 20 1.26 v in - 2 to the pwn comparator input r2 r1 fb2 v out2 error amplifier 2 v out2 = 1.26 r 1 + r 2 r 2 in - 3 in + 3 to the pwm comparator input r4 r3 r2 r1 fb3 v out3 v ref error amplifier 3 v out3 = r 1 +r 2 r 3 + r 4 v ref r 4 r 2 16 18 17 in - 3 in + 3 to the pwm comparator input r2 r1 fb3 v ref v out3 error amplifier 3 v out3 = - v ref r 2 r 1 16 18 17
voltage regulators AN8049FHN 17 n application notes (continued) [4] function descriptions (continued) 7. low input voltage malfunction prevention circuit (u.v.l.o.) this circuit protects the system against degradation or destruction due to incorrect control operation when the power supply voltage falls during power on or power off. the low input voltage malfunction prevention circuit detects the internal reference voltage that changes with the supply voltage level. while the supply voltage is rising, this circuit cuts off the output drive transistor until the reference voltage reaches 1.67 v. it also sets the dead-time to 100% and at the same time holds the s.c.p. pin (pin 23) and the dt pins (pins 1, 2, and 24) at 0 v, and the osc pin (pin 15) at about 1.2 v. 8. pwm comparators the pwm comparators control the on-period of the output pulse according to their input voltage. the output transistors are turned on during periods when the osc pin (pin 15) triangular wave is lower than both of the corresponding fb pin (pins 18, 20, or 22) and the corresponding dt pin (pins 1, 2, or 24). the pwm 2 circuit turns the output transistor on during periods when osc pin (pin 15) triangular wave is at a higher level than both of the fb2 pin (pin 20) and the dt2 pin (pin 1). the maximum duty is set to 86% internally, but it can be set to a value lower than 86% by inserting a resistor between the corresponding dt pin and ground, and can be set to a value higher than 86% by inserting a resistor between the corresponding dt pin and the v ref pin. the ic's soft start function operates to gradually increase the width of the output pulse on-period during startup if a capacitor is inserted between the dt pin and ground. 9. output 1 and output 2 blocks these output circuits have a totem pole structure. a constant-current source output with good line regulation can be set up freely by connecting current setting resistors to the rb pins. these circuits can provide a constant-current source output of up to 50 ma. 10. output 3 block this output circuit has an open collector structure. an output current of up to 50 ma can be provided, and the output pin has a breakdown voltage of 15 v. 11. ctl block the ctl block output circuit also has a totem pole structure. a constant-current source output with good line regulation can be set up freely by connecting current setting resistors to the rb2 pin. the ctl block can provide a constant-current source output of up to 50 ma.
AN8049FHN voltage regulators 18 n application notes (continued) [5] time constant setup for the timer latch short-circuit protection circuit figure 6 shows the structure of the timer latch short-circuit protection circuit. the short-circuit protection comparator continuously compares a 0.9 v reference voltage with the fb1, fb2, and fb3 error amplifier outputs. when the dc-dc converter output load conditions are stable, the short-circuit protection comparator holds its average value since there are no fluctuations in the error amplifier outputs. at this time, the output transistor q1 will be in the conducting state, and the s.c.p. pin will be held at 0 v. if the output load conditions change rapidly and a high-level signal (0.9 v or higher) is input to the short-circuit protection comparator from the error amplifier output, the short-circuit protection comparator will output a low level and the output transistor q1 will shut off. then, the capacitor c scp connected to the s.c.p. pin will start to charge. when the external capacitor c scp is charged to about 1.26 v by the constant current of about 1.1 ma, the latch circuit will latch and the dead-time will be set to 100% with the output held fixed at the low level. once the latch circuit has latched, the s.c.p. pin capacitor will be discharged to about 0 v, but the latch circuit will not reset unless either power is turned off or the power supply is restarted using on/off control. 1.26 v = i chg t pe c scp \ t pe (s) = 1.15 c scp ( m f) at power supply startup, the output appears to be in the shorted state, and the ic starts to charge the s.c.p. pin capacitor. therefore, users must select an external capacitor that allows the dc-dc converter output voltage to rise before the latch circuit in the later stage latches. in particular, care is required if the soft start function is used, since that function makes the startup time longer. figure 5. s.c.p. pin charging waveform figure 6. short-circuit protection circuit short-circuit detection time t pe t (s) 0 1.26 v scp (v) fb2 fb3 fb1 0.9 v s.c.p. comp. s.c.p. high level detection comparator v ref v cc q1 on/off control 1.1 m a u.v.l.o. r s q latch 1.26 v output shutoff 22 18 20 23
voltage regulators AN8049FHN 19 n application notes (continued) [6] parallel synchronous operation of multiple ics multiple instances of this ic can be operated in parallel. if the osc pins (pin 15) and off pins (pin 6) are connected to each other as shown in figure 7, the ics will operate at the same frequency. it is also possible to operate a one-channel control ic (e.g. the an8016sh or an8016nsh) and a two-channel control ic (e.g. the an8017sa or an8018sa) in this parallel synchronous mode. in this case, short the osc and off pins together. note that it is not possible to control the on/off states of each ic operating in this mode independently. it is only possible to turn all the ics on or off at the same time remotely. 7 6 2 15 s.c.p. off osc osc v ref 7 6 2 15 s.c.p. off v ref off pins connected together osc pins connected together h l AN8049FHN AN8049FHN figure 7. slave operation circuit example
AN8049FHN voltage regulators 20 n application notes (continued) [7] sequential operation delays can be provided in the startup times by inserting capacitors (c ctl ) between the ctl pins and ground. delay time: t dly = 1.26 (v) c ctl ( m f)/1.1 ( m a) (s) note that the individual channels can also be turned on or off independently by external signals. these external signals may have voltages in the range 0 v to v cc . 3 c ctl3 c ctl2 c ctl1 ctl3 ctl2 ctl1 4 5 AN8049FHN c ctl1 < c ctl2 < c ctl3 u.v.l.o. cleared 1.26 v out1 out2 out3 ctl1 ctl2 ctl3 figure 8. sequential operation
voltage regulators AN8049FHN 21 n application notes (continued) [8] differences between this ic and the an8049sh the pin arrangements differ. the an8049sh is an alternative package version of this ic. ctl1 off v ref rb2 rb1 out1 ctl2 ctl3 dt1 dt2 dt3 s.c.p. 6 5 4 3 2 1 in + 3 osc v cc out3 gnd out2 18 19 20 21 22 23 24 in - 3 fb3 in - 2 fb2 in - 1 fb1 7 8 9 10 11 12 17 16 15 14 13 an8049sh in - 2 fb3 in - 3 in + 3 osc v cc out3 19 18 17 16 15 14 13 dt2 1 2 3 4 5 6 7 dt1 ctl3 ctl2 ctl1 off v ref 12 11 10 rb1 out1 out2 gnd 9 rb2 8 fb2 in - 1 20 21 fb1 22 s.c.p. 23 dt3 24 AN8049FHN
AN8049FHN voltage regulators 22 0 - 45 - 135 - 180 - 90 - 225 phase ( ) frequency (hz) 100m 100k 1m 10m 10k 1k 40 30 10 - 10 20 0 - 20 gain (db) amp.3 1 kw 100 k w 1 k w 1 k w 10 m f 10 m f fb3 v out 1 v v in 4 mv[p-p] in - 3 in+3 n application notes (continued) [9] error amplifier frequency characteristics 1. error amplifiers 1 and 2 (test circuit) 180 135 45 0 90 - 45 phase ( ) frequency (hz) 100m 100k 1m 10m 10k 1k 40 30 10 -10 20 0 -20 gain (db) amp.1 v ref 1.26 v 100 k w 100 k w 1 k w 10 m f fb1 v out 2.3 v v in 4 mv[ p-p] in - 1 2. error amplifier 3 (test circuit)
voltage regulators AN8049FHN 23 n application circuit example in - 2 fb3 in - 3 in + 3 osc v cc v in v o3 v o1 v o1 out3 19 18 17 16 15 14 13 dt2 1 2 3 4 5 6 7 dt1 ctl3 ctl2 ctl1 off v ref 12 11 10 rb1 out1 out2 gnd 9 rb2 8 fb2 in - 1 20 21 fb1 22 s.c.p. 23 dt3 24 - + + q3 q2 q1 v ref

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